Buffer Issue Resolution Documents (BIRD)

To submit a BIRD to the IBIS Open Forum, please use the BIRD Template, Rev. 1.3.

ID# Issue Title Requester Date
Submitted
Date
Accepted
Supporting
Version
231 Clarifications on AMI Block Concepts Michael Mirmak, Intel Corporation March 26, 2024    
230 Adding a Definitions Section to IBIS Michael Mirmak, Intel Corporation March 19, 2024    
229.1 AMI Test Data Support Michael Mirmak, Intel Corp. December 19, 2023, February 13, 2024    
229 AMI Test Data Support Michael Mirmak, Intel Corp. Dececmber 19, 2023    
228 Pin Name Field Extension Michael Mirmak, Intel Corporation December 5, 2023 January 26, 2024  
227 AMI Ignore Block Feature Alaeddin A. Aydiner, Sai Zhou, Intel Corp. November 14, 2023 January 5, 2024  
226 PSIJ Sensitivity Kinger Cai, Fern Nee Tan, Chi-te Chen, Michael Mirmak, Intel Corp. August 8, 2023 December 8, 2023  
225 Clarification for bus_label rules Arpad Muranyi, Weston Beal, Randy Wolff, Siemens EDA July 11, 2023 September 15, 2023  
224 New AMI Reserved Parameters for Ts4file port order Liwei Zhao, Intel Corp.; Michael Mirmak, Intel Corp. April 25, 2023 June 23, 2023  
223.1 Add support for SPIM in IBIS Kinger Cai, Chi-te Chen, Intel Corp. March 7, 2023, September 12, 2023 July 14, 2023 (223); November 17, 2023 (223.1)  
222 Clock Times Clarifications Arpad Muranyi, Siemens EDA November 8, 2022 December 9, 2022 7.2
221 AMI_parameters_in Clarification Michael Mirmak, Intel Corp. October 26, 2022 December 9, 2022 7.2
220 Pre-driver PSIJ Sensitivity Keyword Yifan Ding, Chulsoon Hwang, Missouri S&T; Zhiping Yang, Waymo; Randy Wolff, Micron Technology October 20, 2022    
219.1 AMI Parameter Root Name Clarifications Michael Mirmak, Intel Corp. March 29, 2022, May 3, 2022 August 12, 2022 7.2
218 Designator Pin List Relaxation Arpad Muranyi, Siemens EDA March 2, 2022 April 22, 2022 7.2
217 Require Clocked Rx Models to Return Clock Times Arpad Muranyi, Siemens EDA January 18, 2022 March 11, 2022 7.2
216 Alphanumeric Pin Names Arpad Muranyi, Siemens EDA January 18, 2022 March 11, 2022 7.2
215 Back-channel Statistical Optimization Editorial Update Randy Wolff, Micron Technology; Bob Ross, Teraspeed Labs September 22, 2021 October 29, 2021 7.1
214 Change "bit_time" to "symbol_time" Arpad Muranyi, Siemens EDA September 15, 2021 October 8, 2021 7.1
213.1 Extending IBIS-AMI for PAMn Analysis Walter Katz, The MathWorks, Inc May 5, 2021, May 31, 2022 July 22, 2022 7.2
212 Clarification of PAM4_UpperThreshold, PAM4_CenterThreshold, PAM4_LowerThreshold Hansel Desmond Dsilva, Achronix Semiconductor April 13, 2021 May 14, 2021 7.1
211.4 IBIS AMI Reference Flow Improvements Walter Katz, The MathWorks, Fangyi Rao, Keysight Technologies March 23, 2021, April 21, 2021; June 11, 2021; August 24, 2021; February 8, 2022 April 1, 2022 7.2
210 New Redriver AMI Flow Fangyi Rao, Keysight Technologies February 19, 2021 Rejected April 22, 2022 NA
209 Make Clock Times Output Required for Clock Executable Models Arpad Muranyi, Siemens Digital Industries Software January 28, 2021 March 12, 2021 7.1
208 Clock-Data Pin Relationship Keyword Michael Mirmak, Intel Corp. October 6, 2020 January 8, 2021 7.1
207 New AMI Reserved Parameters Component_Name and Signal_Name Randy Wolff, Micron Technology July 29, 2020 October 9, 2020 7.1
206 Clarification of text "transition time" Hansel Desmond Dsilva, Achronix Semiconductor; Walter Katz, Signal Integrity Software; Fangyi Rao, Keysight; Todd Bermensolo, Keysight; Arpad Muranyi, Mentor Graphics. June 26, 2020 September 18, 2020 7.1
205 New AMI Reserved Parameter for Sampling Position in AMI_Init Flow Hansel Desmond Dsilva, Achronix Semiconductor; Walter Katz, Signal Integrity Software; Todd Bermensolo, Keysight; Fangyi Rao, Keysight; Arpad Muranyi; Mentor Graphics; Ambrish Varma, Cadence May 14, 2020 June 26, 2020 7.1
204 DQ_DQS GetWave Flow for Clock Forwarding Modeling Walter Katz, The MathWorks Fangyi Rao, Keysight Wendem Beyene, Intel Ambrish Varma, Cadence April 22, 2020 June 26, 2020 (Superseded by BIRD209) 7.1
203 Submodel Clarification Randy Wolff, Micron Technology March 10, 2020 April 24, 2020 7.1
202.3 Electrical Descriptions of Modules Walter Katz, Signal Integrity Software; Justin Butterfield, Micron Technology; Curtis Clark, ANSYS; Arpad Muranyi, Siemens Digital Industries Software; Michael Mirmak, Intel Corp.; Bob Ross, Teraspeed Labs; Lance Wang, Zuken USA; Randy Wolff, Micron Technology January 22, 2020, October 29, 2020; January 27, 2021; February 19, 2021 March 12, 2021 7.1
201.1 Back-channel Statistical Optimization Walter Katz, Signal Integrity Software January 7, 2020, June 2, 2020 July 17, 2020 (Superseded by BIRD215) 7.1
200 C_comp Model Using IBIS-ISS or Touchstone Randy Wolff, Micron Technology, Inc. Walter Katz, Signal Integrity Software, Inc. July 9, 2019 September 27, 2019 7.1
199 Fix Rx_Receiver_Sensitivity Inconsistencies Arpad Muranyi, Mentor a Siemens Business March 19, 2019 June 7, 2019 7.1
198.3 Keyword Additions for On-Die PDN (Power Distribution Network) Modeling Kazuki Murata; Sony LSI Design Inc.; Miyoko Goto; Ricoh Co., Ltd.; Kazuyuki Sakata; Renesas Electronics Corporation; Kazunori Yamada; Renesas Electronics Corporation; Kouji Ichikawa; Denso Corporation; Atsushi Tomishima; Toshiba Electronic Devices & Storage Corporation; Takashi Hasegawa; Sony LSI Design Inc.; Koichi Seko, Panasonic Industrial Devices Systems and Technology Co., Ltd.; Toshiki Kanamoto; Hirosaki University Megumi Ono; Socionext Inc. March 11, 2019, April 3, 2020, June 23, 2020, August 7, 2020 August 7, 2020 7.1
197.7 New AMI Reserved Parameter DC_Offset Walter Katz, SiSoft, Ambrish Varma, Cadence Design Systems, Randy Wolff, Micron Technology, Justin Butterfield, Micron Technology, Fangyi Rao, Keysight Technologies November 27, 2018, December 4, 2018, January 15, 2019, June 25, 2019, July 23, 2019, October 15, 2019, December 3, 2019, January 7, 2020 February 21, 2020 7.1
196.1 Prohibit Periods at the End of File Names Arpad Muranyi, Mentor Graphics, A Siemens Business September 25, 2018, October 12, 2018 October 12, 2018 7.0
195.1 Enabling [Rgnd] and [Rpower] Keywords for Input Models Michael Mirmak, Intel Corp. June 19, 2018, June 29, 2018 August 31, 2018 7.1
194 Revised AMI Ts4file Analog Buffer Models Walter Katz, Signal Integrity Software, Inc. Todd Westerhoff, Signal Integrity Software, Inc. Fangyi Rao, Keysight Technologies, Inc. Radek Biernacki, Keysight Technologies, Inc. May 2, 2018 June 29, 2018 7.0
193 Figure 29 corrections Arpad Muranyi, Mentor Graphics, A Siemens Business January 10, 2018 March 23, 2018 7.0
192.1 Clarification of List Default Rules Michael Mirmak, Intel Corp. August 22, 2017, August 23, 2017 September 15, 2017 7.0
191.2 Clarifying Locations for Si_location and Timing_location Bob Ross, Teraspeed Labs June 28, 2017, August 04, 2017; August 08, 2017 September 15, 2017 7.0
190 Clarification for Redriver Flow Ambrish Varma, Cadence Design Systems, Inc. June 14, 2017 Rejected April 22, 2022 NA
189.7 Interconnect Modeling Using IBIS-ISS and Touchstone Walter Katz, Signal Integrity Software (SiSoft); Radek Biernacki, Keysight Technologies; Justin Butterfield, Micron Technology; Curtis Clark, ANSYS; Mike LaBonte, Signal Integrity Software (SiSoft); Arpad Muranyi, Mentor Graphics; Michael Mirmak, Intel Corp.; Bob Ross, Teraspeed Labs; Randy Wolff, Micron Technology January 27, 2017, March 29, 2017; April 19, 2017; April 26, 2017; June 22, 2017; April 25, 2018; May 16, 2018; June 29, 2018 June 29, 2018 7.0
188.1 Expanded Rx Noise Support for AMI Michael Mirmak, Intel Corporation December 13, 2016, January 17, 2017 February 17, 2017 7.0
187.3 Format and Usage Out Clarifications Michael Mirmak, Intel Corporation December 13, 2016, December 16, 2016; January 10, 2017; March 14, 2017 April 21, 2017 7.0
186.4 File Naming Rules Walter Katz, Mike LaBonte, Signal Integrity Software, Inc.; Bob Ross, Teraspeed Labs November 29, 2016, February 16, 2017; April 14, 2017; June 22, 2017, July 14, 2017 July 14, 2017 7.0
185.2 Section 3 Reserved Word Guideline Update Bob Ross, Teraspeed Labs September 13, 2016, October 14, 2016; December 6, 2016 January 6, 2017 7.0
184.2 Model_name and Signal_name Restriction for POWER and GND Pins Bob Ross, Teraspeed Labs September 1, 2016, September 16, 2016; December 6, 2016 January 6, 2017 7.0
183 [Model Data] Matrix Subparameter Terminology Correction Bob Ross, Teraspeed Labs August 30, 2016 October 14, 2016 7.0
182 POWER and GND [Pin] signal_name as [Pin Mapping] bus_label Walter Katz, Signal Integrity Software August 30, 2016 October 14, 2016 7.0
181.1 I-V Table Clarifications Mike LaBonte, Signal Integrity Software; Bob Ross, Teraspeed Labs August 26, 2016, October 13, 2016 Rejected May 13, 2022 NA
180 Require Unique Pin Names in [Pin] Mike LaBonte, Signal Integrity Software February 17, 2016 October 14, 2016 7.0
179 New IBIS-AMI Reserved Parameter Special_Param_Names Arpad Muranyi, Mentor Graphics October 13, 2015 December 18, 2015 7.0
178.3 Specifying Buffer Directionality for AMI Michael Mirmak, Intel Corp. June 2(am), 2015, June 2(pm), 2015; June 16, 2015; July 31, 2015 July 31, 2015 6.1
177 [Initial Delay] keyword for Submodels and Driver Schedules Radek Biernacki and Ming Yan, Keysight Technologies, Inc.; Justin Butterfield and Randy Wolff, Micron Technology, Inc. May 21, 2015 June 12, 2015 6.1
176 Power Pin Package Modeling Randy Wolff, Micron Technology, Inc.; Radek Biernacki, Keysight Technologies; Bob Ross, Teraspeed Labs May 8, 2015 June 12, 2015 6.1
175.3 Extending IBIS-AMI for PAM4 Analysis Walter Katz, Mike Steinberger, Todd Westerhoff (SiSoft) Fangyi Rao (Keysight), Bob Miller (Avago), Hongtao Zhang (Xilinx) April 30, 2015, May 22, 2015, June 3, 2015, June 12, 2015 June 12, 2015 6.1
174.1 Quote Character Clarifications Arpad Muranyi, Mentor Graphics November 11, 2014, January 28, 2015 February 27, 2015 6.1
173.3 Package RLC Matrix Diagonals Randy Wolff, Micron Technology, Inc.; Arpad Muranyi and Vladimir Dmitriev-Zdorov, Mentor Graphics; Bob Ross, Teraspeed Consulting Group July 16, 2014, August 19, 2014; September 4, 2014; September 17, 2014 October 3, 2014 6.1
172.2 Extend Multilingual Parameter and Converter_Parameter Rules Bob Ross, Teraspeed Consulting Group July 11, 2014, August 6, 2014, August 22, 2014 August 22, 2014 6.1
171.3 Clarify that Empty Root Name is Not Permitted in AMI Files Bob Ross, Teraspeed Consulting Group June 25, 2014, July 11, 2014, August 6, 2014, August 22, 2014 August 22, 2014 6.1
170 Delete Extra Paragraph for Ports under [External Circuit] Bob Ross, Teraspeed Consulting Group June 25, 2014 August 1, 2014 6.1
169.1 DLL Dependency Checking Arpad Muranyi, Mentor Graphics; Mike LaBonte, SiSoft June 24, 2014, August 22, 2014 October 3, 2014 6.1
168.1 Handling of Overclocking Caused by Delay in Waveform Tables Radek Biernacki and Ming Yan, Agilent Technologies, Inc.; Justin Butterfield and Randy Wolff, Micron Technology, Inc. April 22, 2014, June 20, 2014 June 20, 2014 6.1
167.1 Table Corrections for Tx Jitter Parameters and Ignore_Bits Michael Mirmak, Intel Corp. April 22, 2014, April 23, 2014 May 23, 2014 6.1
166.4 Resolving problems with Redriver Init Flow Walter Katz, Signal Integrity Software, Inc. Bob Miller, Broadcom, Inc. Yunong Gan, Broadcom, Inc. Dong Yang, Broadcom, Inc. April 2, 2014; April 18, 2017; April 26, 2017; July 19, 2017; August 4, 2017 Rejected April 22, 2022 NA
165.1 Parameter Passing Improvements for [External Circuit]s Arpad Muranyi & John Angulo, Mentor Graphics; Ambrish Varma & Brad Brim, Cadence Design Systems, Inc January 9, 2014, November 20, 2017 December 15, 2017 7.0
164 Allowing Package Models to be defined in [External Circuit] Ambrish Varma & Brad Brim, Cadence Design Systems, Inc.; Arpad Muranyi, Mentor Graphics January 9, 2014 Rejected July 20, 2018 NA
163 Instantiating and Connecting [External Circuit] Package Models with [Circuit Call] Arpad Muranyi & John Angulo, Mentor Graphics; Ambrish Varma & Brad Brim, Cadence Design Systems, Inc. January 9, 2014 Rejected July 20, 2018 NA
162.1 Change to Usage "Info, Out" for AMI Jitter and Noise Parameters Bob Ross, Teraspeed Consulting Group; Walter Katz, SiSoft; Fangyi Rao, Agilent Technologies July 9, 2013, July 16, 2013 August 9, 2013 6.0
161.1 Supporting Incomplete and Buffer-only [Component] Descriptions Michael Mirmak, Intel Corp. May 8, 2013, May 10, 2013 Rejected October 27, 2017 NA
160.1 Analog Buffer Modeling Improvements Arpad Muranyi, Mentor Graphics March 19, 2013, April 23, 2013 May 17, 2013 6.0
159 Rx_Receiver_Sensitivity Clarification Arpad Muranyi, Mentor Graphics March 14, 2013 Rejected April 26, 2013 NA
158.7 AMI Ts4file Analog Buffer Models Walter Katz, Signal Integrity Software, Inc. Todd Westerhoff, Signal Integrity Software, Inc. Fangyi Rao, Keysight Technologies, Inc. Radek Biernacki, Keysight Technologies, Inc. February 20, 2013; May 15, 2013; May 17, 2013; May 24, 2013; April 18, 2017; April 27, 2017; September 26, 2017; October 27, 2017 October 27, 2017 (Superseded by BIRD194) 7.0
157 Parameterize [Driver Schedule] Arpad Muranyi, Mentor Graphics; Romi Mayder, Xilinx January 24, 2013 Rejected August 21, 2015 NA
156.3 IBIS-AMI Extension for Mid-channel Redrivers and Retimers Mahbubul Bari, Ron Olisar, and Hassan Rafat, Maxim Integrated; Fangyi Rao and Colin Warwick, Agilent Technologies, Inc.; Walter Katz and Todd Westerhoff, Signal Integrity Software, Inc. January 11, 2013, January 12, 2013; May 24, 2013, June 7, 2013 June 7, 2013 6.0
155.2 New AMI API to Resolve Dependent Model Parameter Fangyi Rao and Radek Biernacki, Agilent Technologies, Inc. Adge Hawes, IBM December 13, 2012, September 10, 2013, September 17, 2013 Oct. 11, 2013 6.1
154.1 Using IBIS-AMI Leaf List_Tip in List Parameters Walter Katz, Signal Integrity Software, Inc. November 16, 2012, May 24, 2013 June 7, 2013 6.0
153.1 Parameter Tree Keyword Arpad Muranyi, Mentor Graphics June 19, 2012, March 14, 2013 Rejected June 7, 2013 NA
152 Analog Model Boundary Definition Arpad Muranyi, Mentor Graphics May 1, 2012 June 1, 2012 6.0
151 IBIS-AMI Modified Reserved Parameters for Jitter/Noise Walter Katz, SiSoft; Bob Ross, Teraspeed Consulting Group February 17, 2012 March 9, 2012 5.1
150 IBIS-AMI New Reserved Parameters for Dependency Tables Walter Katz, Todd Westerhoff, SiSoft; Adge Hawes, IBM Jan. 20, 2012 Rejected Oct. 11, 2013 NA
149.1 Usage Out Syntax Correction Arpad Muranyi, Mentor Graphics, Inc. January 10, 2012, February 6, 2012 February 17, 2012 5.1
148 Allowable Model_types with IBIS-AMI Arpad Muranyi, Mentor Graphics, Inc. November 30, 2011 January 6, 2012 5.1
147.6 Back-channel Support Bob Miller, Broadcom, Ltd Ambrish Varma, Cadence Design Systems, Inc; Walter Katz, Signal Integrity Software, Inc; Kumar Keshavan, Cadence Design Systems, Inc; Ken Willis, Cadence Design Systems, Inc October 18, 2011, September 1, 2016, October 11, 2016, October 13, 2016, November 29, 2016, January 20, 2017, February 14, 2017 March 10, 2017 7.0
146 Clarify sample_interval for IBIS-AMI Arpad Muranyi, Mentor Graphics October 18, 2011 December 9, 2011 5.1
145.3 Cascading IBIS I/O buffers with [External Circuit]s using the [Model Call] keyword Taranjit Kukal, Ambrish Varma, Cadence Design Systems, Inc. Arpad Muranyi, Mentor Graphics. September 19, 2011, November 10, 2011; May 21, 2013 Rejected July 20, 2018 NA
144.3 Add Touchstone to [External Model] and [External Circuit] as a Supported Language Taranjit Kukal, Feras Al-Hawari, Ambrish Varma, Terry Jernberg, Cadence Design Systems, Inc.; Kent Dramstad, Adge Hawes, IBM Microelectronics September 19, 2011, November 10, 2011; February 10, 2012; March 5, 2011 Rejected April 26, 2013 NA
143.1 Correcting the rules for AMI_Close Arpad Muranyi, Mentor Graphics June 29, 2011, September 6, 2011 October 7, 2011 5.1
142 Clarification of [Test Data] and [Test Load] scoping Mike LaBonte, Cisco Systems Bob Ross, Teraspeed Consulting Group July 5, 2011 September 16, 2011 5.1
141 [Composite Current] Clarifications Randy Wolff, Micron Technology and Lance Wang, IO Methodology July 1, 2011 September 16, 2011 5.1
140.2 Format Corner and Range Clarification for IBIS-AMI Arpad Muranyi, Mentor Graphics June 28, 2011, November 30, 2011 December 15, 2011 January 6, 2012 5.1
139.2 Reserved_Parameters Order Bob Ross, Teraspeed Consulting Group June 21, 2011, July 12, 2011, September 16, 2011 September 16, 2011 5.1
138 IBIS-AMI Section 6c Tables Update Bob Ross, Teraspeed Consulting Group June 21, 2011 September 16, 2011 5.1
137.2 AMI_parameters_in, AMI_parameters_out, msg Clarifications Arpad Muranyi, Mentor Graphics; Curtis Clark, Ansys June 21, 2011, August 2, 2011, September 6, 2011 September 16, 2011 5.1
136 Defining Relationships between Type and Format Ambrish Varma, Cadence Design Systems, Inc. June 21,2011 September 16, 2011 5.1
135.1 Add Boolean to BNF for IBIS-AMI Arpad Muranyi, Mentor Graphics May 31, 2011, August 2, 2011 September 16, 2011 5.1
134 AMI Function Return Value Clarification Arpad Muranyi, Mentor Graphics May 20, 2011 June 24, 2011 5.1
133.1 Model Corner C_comp Bob Ross, Teraspeed Consulting Group May 25, 2011, January 6, 2012 January 6, 2012 5.1
132 Clarification of the Table Format for IBIS_AMI Bob Ross, Teraspeed Consulting Group May 25, 2011 August 5, 2011 5.1
131 IBIS-AMI Repeaters Walter Katz, Signal Integrity Software, Inc. April 21, 2011 Rejected June 7, 2013 NA
130 Crosstalk Clarification With Respect to AMI Ken Willis, Sigrity, Inc. Arpad Muranyi, Mentor Graphics, Inc. April 12, 2011 June 24, 2011 5.1
129.1 Add "polarity" Argument to D_to_A Converters Arpad Muranyi, Mentor Graphics March 24, 2011, March 14, 2013 Rejected April 26, 2013 NA
128.2 Allow AMI_parameters_out to pass AMI_parameters_in data on calls to AMI_GetWave Walter Katz, SiSoft; Ambrish Varma, Cadence Design Systems, Inc. March 11, 2011, August 7, 2014; August 22, 2014 Rejected October 14, 2016 NA
127.4 IBIS-AMI Typographical Corrections Arpad Muranyi, Mentor Graphics, Inc. January 18, 2011, May 17, 2011; August 16, 2011; October 18, 2011; November 3, 2011 December 9, 2011 5.1
126 IBIS-AMI New Reserved Parameter AMI_Version Walter Katz, SiSoft; Arpad Muranyi, Mentor Graphics, Inc. December 14, 2010 February 18, 2011 5.1
125.1 Make IBIS-ISS Available for IBIS Package Modeling Arpad Muranyi, Mentor Graphics October 21, 2010, July 5, 2011 Rejected July 20, 2018 NA
124 IBIS-AMI New Reserved Parameters for Dependency Tables Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoft October 20, 2010 Rejected May 11, 2012 NA
123.5 IBIS-AMI New Reserved Parameters for Jitter/Noise Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoft October 20, 2010, April 1, 2011; January 3, 2012, June 11, 2012; October 23, 2012, December 28, 2012 January 11, 2013 6.0
122 IBIS-AMI New Reserved Parameters for Analog Modeling Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoft October 20, 2010 Rejected April 26, 2013 NA
121.2 IBIS-AMI New Reserved Parameters for Data Management Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoft October 20, 2010, June 1, 2011; November 20, 2012 January 11, 2013 6.0
120.1 IBIS-AMI Flow Correction Walter Katz, Signal Integrity Software, Inc.; Ken Willis, Sigrity, Inc.; Ambrish Varma, Cadence Design Systems, Inc. October 5, 2010, March 15, 2011 April 22, 2011 5.1
119 IBIS-AMI New Reserved Parameters Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoft October 5, 2010 Rejected Jan. 28, 2011 NA
118.4 Analog Parameter Assignments Arpad Muranyi, Mentor Graphics; Ambrish Varma, Feras Al-Hawari, and Taranjit Kukal, Cadence Design Systems October 5, 2010, November 8, 2010; March 23, 2011; June 19, 2012; March 14, 2013 Rejected April 26, 2013 NA
117.5 Parameterize A_to_D and D_to_A Converters Arpad Muranyi, Mentor Graphics; Ambrish Varma, Feras Al-Hawari, and Taranjit Kukal, Cadence Design Systems September 29, 2010, October 5, 2010; November 8, 2010; March 23, 2011; June 19, 2012; March 14, 2013 Rejected April 26, 2013 NA
116.2 Add IBIS-ISS to [External Model] and [External Circuit] as a Supported Language Arpad Muranyi, Mentor Graphics September 29, 2010, June 19, 2012; March 14, 2013 Rejected April 26, 2013 NA
115 Clarifying Min/Typ/Max in IBIS-AMI Arpad Muranyi, Mentor Graphics, Inc. September 23, 2010 October 22, 2010 5.1
114.3 IBIS-AMI Definition Clarifications Arpad Muranyi, Mentor Graphics, Inc. August 24, 2010, September 8, 2010, October 20, 2010, November 8, 2010 December 10, 2010 5.1
113.3 Weak tie-up or tie-down resistance and voltage Greg Edlund, IBM August 19, 2010, September 10, 2010, October 20, 2010, October 22, 2010 November 19, 2010 5.1
112 IBIS-AMI clock_times Clarification Scott McMorrow, Teraspeed Consulting Group May 4, 2010 June 11, 2010 5.1
111.3 Extended Usage of External Series Components in EBDs Michael Schaeder, Zuken July 1, 2008, September 18, 2008, February 10, 2009, April 3, 2009 April 24, 2009 5.1
110 Algorithmic Modeling Interface Section Title Bob Ross, Teraspeed Consulting Group June 24. 2008 July 11, 2008 5.0
109.1 S_overshoot_high/S_overshoot_low Clarification Anders Ekholm, Ericsson May 14, 2008, June 6, 2008 June 6, 2008 5.0
108.1 Fixing Algorithmic Modeling API Impulse_matrix Nomenclature Bob Ross, Teraspeed Consulting Group April 29, 2008, June 6, 2008 June 6, 2008 5.0
107.2 Update to Algorithmic Modeling API (AMI) Support in IBIS Todd Westerhoff, SiSoft and Zhen Mu, Cadence Design Systems April 3, 2008, April 24, 2008, April 29, 2008 May 16, 2008 5.0
106 Clarification on Signal_pin Parameters Arpad Muranyi, Mentor Graphics Corp. February 26, 2007 May 16, 2008 5.0
105 Mandatory Golden Waveform Data Anders Ekholm, Ericsson February 22, 2008 Rejected June 6, 2008 NA
104.1 Algorithmic Modeling API (AMI) Support in IBIS (in alphabetical order by company) C. Kumar, Hemant Shah, Ambrish Varma, Cadence; Ian Dodd, Consultant; Adge Hawes, IBM; John Angulo, Arpad Muranyi, Mentor Graphics; Walter Katz, Mike Steinberger, Todd Westerhoff, SiSoft October 10, 2007, November 12, 2007 November 30, 2007 5.0
103.1 [Model Spec] DDR2 Overshoot/Undershoot Parameters Randy Wolff, Micron Technology, Inc. April 14, 2006; May 10, 2006 June 2, 2006 5.0
102 File Name Limit Extension Michael Mirmak, Intel Corp. January 8, 2006 February 17, 2006 4.2
101 Section 6b, Figure 12 Example Note Bob Ross, Teraspeed Consulting Group December 1, 2005 January 6, 2006 4.2
100.2 Allow Pure Analog *-AMS Models Ian Dodd, Mentor Graphics; Arpad Muranyi, Intel Corporation November 10, 2005, December 2, 2005, January 13, 2006 January 27, 2006 4.2
99.1 AMS Language Versions Arpad Muranyi, Intel Corp. June 10, 2005, July 15, 2005 August 5, 2005 4.2
98.3 Gate Modulation Effect (table format) Arpad Muranyi, Mentor Graphics Corp.; Antonio Girardi, Giacomo Bernardi, Roberto Izzi, STMicroelectronics; Bob Ross, Teraspeed Consulting Group May 20,2005, March 9, 2007, July 31, 2007, October 10, 2007 November 2, 2007 5.0
97.2 Gate Modulation Effect Arpad Muranyi, Intel Corp. March 4, 2005, April 22, 2005, May 25, 2005 Rejected November 30, 2007 NA
96 [Model Spec] and [Receiver Thresholds] Ordering Randy Wolff, Micron Technology, Inc. December 29, 2004 February 18, 2005 4.2
95.6 Power Integrity Analysis using IBIS Syed Huq, Vinu Arumugham and Zhiping Yang, Cisco Systems; Bob Ross, Teraspeed Consulting Group December 13, 2004, Jan. 28, 2005, March 8, 2005, March 29, 2005, April 19, 2005 April 29, 2005, July 22, 2005 October 7, 2005 5.0
94.2 Clarifications on [Diff Pin] Parameters Arpad Muranyi, Intel Corp. February 22, 2005, March 4, 2005; July 15, 2005 September 16, 2005 4.2
93.1 Model and Signal Name Limit Extension Michael Mirmak, Intel Corp. November 5, 2004, November 21, 2004 December 10, 2004 4.2
92.1 Multiple Terminator and Series Elements under [Model] Michael Mirmak, Intel Corp. November 2, 2004, November 21, 2004 January 28, 2005 4.2
91.3 Multi-lingual Logic States Clarification Ian Dodd and John Angulo, Mentor Graphics Corp. August 26, 2004, October 4, 2004; October 26, 2004 November 19, 2004 4.2
90.2 Multiple A_to_D Subparameters Clarification Bob Ross, Teraspeed Consulting Group August 17, 2004, September 1, 2004, September 22, 2004 October 29, 2004 4.2
89.1 Keyword Hierarchy Tree Michael Mirmak, Intel Corporation April 5, 2004, May 11, 2004 June 4, 2004 4.2
88.3 Driver Schedule Initialization Bob Ross, Teraspeed Consulting Group; Arpad Muranyi, Intel March 9, 2004, June 11, 2004, June 18, 2004, June 21, 2004 July 16, 2004 4.2
87 Series Pin Mapping Clarifications Arpad Muranyi, Intel Corporation January 19, 2004 February 20, 2004 4.2
86.1 Clarification of Submodel Mode Lynne Green, Green Streak Programs, Bob Ross, Teraspeed November 21, 2003, December 26, 2003 January 9, 2004 4.1
85.3 Slew Time Estimate Clarifications John Angulo, Mentor Graphics Corp. October 3, 2003, November 7, 2003; December 3, 2003; December 8, 2003 January 9, 2004 4.1
84.1 Driver Schedule Clarifications Arpad Muranyi, Intel Corporation September 30, 2003, November 21, 2003 December 5, 2003 4.1
83.2 Series Element Clarifications Michael Mirmak, Intel Corporation September 17, 2003, November 7, 2003; November 19, 2003 December 5, 2003 4.1
82.2 Clarification of Clamp Table Use Lynne Green, Cadence, and Robert Haller, SiSoft June 27, 2003, August 7, 2003, August 22, 2003 August 22, 2003 4.1
81.1 Clarify Usage Rule for [Pin] I/O Model Assignment Lance Wang, Cadence Design Systems, Inc. December 23, 2002; January 10, 2003 February 14, 2003 4.1
80.1 Add External Reference Column to Pin Mapping Keyword Michael Mirmak, Intel Corporation November 25, 2002, January 6, 2003 February 14, 2003 4.1
79 Non-linear Buffer Impedance (extension to C_comp) Luca Giacotto (Alstom Transport) & Arpad Muranyi (Intel Corp.) November 6, 2002 Rejected March 28, 2003 NA
78.1 Comment Line Length Limit Lynne Green, Cadence Design Systems September 6, 2002; December 10, 2002 January 10, 2003 4.1
77.2 Differential Subparameter Additions Bob Ross, Mentor Graphics July 15, 2002, July 26, 2002, December 20, 2002 January 10, 2003 4.1
76.1 Additional Information Related to C_comp Refinements Arpad Muranyi and Stephen Peters, Intel Corp. June 28, 2002, July 19,2002 July 19, 2002 4.0
75.8 Multi-Lingual Model Support Bob Ross and Chris Reid, Mentor Graphics, Arpad Muranyi and Michael Mirmak, Intel 3/29/02, 5/3/02, 7/15/02, 8/14/02, 9/11/02, 9/27/02, 10/18/02, 12/20/02, 12/23/02 1/10/03 4.1
74.6 EMI Parameters Guy de Burgh, Mentor Graphics 3/19/02, 5/31/02, /9/16/02, 4/30/03, 5/21/03, 7/18/03, 8/08/03 08/08/03 5.0
73.4 Fall Back Submodel Bob Ross, Mentor Graphics 8-2-01, 10-1-01, 10-16-01, 11-12-01, 11-19-01 January 11, 2002 4.0
72.3 Accommodating PMOS and NMOS//PMOS Series FET Models Tom Dagostino, Mentor Graphics 7-26-01, 10-3-01, 10-8-01, 10-26-01 10-26-01 4.0
71 Timing Test Loads in [Model Spec] to Support PCI & PCI-X Stephen Peters, Intel Corp. April 30, 2001 August 10, 2001 4.0
70.5 Golden Waveforms Greg Edlund, IBM March 16, 2001, April 16, 2001, April 18, 2001, May 4, 2001, July 23, 2001, August 10, 2001 August 10, 2001 4.0
69.1 Golden Waveforms Greg Edlund, IBM December 15, 2000, February 22, 2001 Rejected March 30, 2001 NA
68.1 Clarify that Rising and Falling Waveforms Should be Correlated David Lorang, Intel October 24, 2000, February 2, 2001 February 16, 2001 4.0
67.1 Increase V-T Table 100 Point Limit Bob Ross, Mentor Graphics, Ian Dodd, Cadence October 24, 2000, October 27, 2000 December 8, 2000 4.0
66 [Model Spec] Vref Addition Scott McMorrow, SiQual November 15, 1999 December 8, 2000 4.0
65.2 C_comp Refinements Arpad Muranyi, Intel 10-25-99, 12-12-2000, 2-2-2001 February 16, 2001 4.0
64.4 Alternate Package Models Arpad Muranyi, Intel; Mike LaBonte, Cadence 10-25-99, 11-19-99, 10-8-2000, 11-1-2000, 11-20-2000 December 8, 2000 4.0
63.3 Documentation of Receiver Setup and Hold Timing Conditions D.C. Sessions (Philips), Stephen Peters, Richard Mellitz, Arpad Muranyi (Intel Corp.) Sept 8, 1999, Dec 27, 1999, Jan 6, 2000, Feb 17, 2000 Rejected March 17, 2000 NA
62.6 Enhanced Specification of Receiver Thresholds DC Sessions (Philips), Stephen Peters, Richard Mellitz, Arpad Muranyi (Intel Corp). Aug 24 1999, Dec 28 1999, Jan 6 2000, Feb 18 2000, Feb 25 2000, Mar 3 2000, Mar 20 2000 April 14, 2000 4.0
61.1 Enhanced Characterization of Receivers D.C Sessions (Philips), Richard Mellitz, Stephen Peters, Arpad Muranyi (Intel Corp) August 9, 1999, Dec 28, 1999 Rejected November 17, 2000 NA
60 Electrical Board Description Diagrams Bob Ross, Mentor Graphics August 4, 1999 August 20, 1999 ANSI 3.2
59.2 Model Spec Diagrams Bob Ross, Mentor Graphics August 3, 1999, August 6, 1999, August 20, 1999 August 20, 1999 ANSI 3.2
58.3 Driver Schedule Keyword Clarification Arpad Muranyi, Intel Corporation 3/2/99, 5/5/99, 5/10/99, 5/28/99 5/28/99 ANSI 3.2
57.1 Timed Bus Hold Extension Bob Ross, Mentor G., Arpad Muranyi & Stephen Peters, Intel December 4, 1998, December 18, 1998 December 18, 1998 3.2
56.1 Relaxation of [Series Pin Mapping] Restriction Bob Ross, Mentor Graphics November 25, 1998, December 18, 1998 December 18, 1998 3.2
55 [Model Spec] Vmeas Addition Bob Ross, Mentor Graphics October 4, 1998 November 20, 1998 3.2
54 Package Model Corrections Bob Ross, Mentor Graphics, Stephen Peters, Intel Corporation September 28, 1998 November 6, 1998 3.2
53.1 IBIS File Character Set Geoffrey Ellis at Cadence Design Systems August 7, 1998, September 1, 1998 September 18, 1998 3.2
52 [Driver Schedule] Clarifications Arpad Muranyi, Intel 6/1/98 July 17, 1998 3.1
51 3-state_ECL Bob Ross, Mentor Graphics May 1, 1998 June 5, 1998 3.2
50.3 Add Submodel Bus Hold Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel 4/2/98, 5/21/98, 5/29/98, 6/19/98 July 17, 1998 3.2
49.4 Add Submodel Dynamic Clamps Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel 4/2/98, 5/1/98, 5/21/98, 6/19/98, 7/17/98 July 17, 1998 3.2
48.4 Add Submodel Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel 4/2/98, 5/1/98, 5/21/98, 5/29/98, 6/19/98 July 17, 1998 3.2
47 Remove pin name as a sub-param of the [Pin List] keyword Stephen Peters Intel Corp. March 5, 1998 April 3, 1998 3.1
46.1 Relaxation of some IBIS model file name restrictions. Matthew Flora and Kellee Crisafulli, HyperLynx 4 Dec 1997, 2 June 1998 June 18, 1998 3.2
45.1 Dynamic Clamps Neven Orhanovic and Bob Ross, Interconnectix 10/31/97, 11/20/97 Rejected 4/24/98 NA
44 Interpretation of Min/Max/Weak/Strong data Andy Ingraham, Digital Equipment Corp. June 8, 1997 Rejected July 17, 1998 NA
43 Component Test Point Subparameters Bob Ross, Interconnectix May 23, 1997 June 12, 1997 3.0
42.3 Modeling Current Waveforms C. Kumar, Cadence, Bob Ross, Interconnectix May 16, 1997, May 19, 1997, May 30, 1997, June 12, 1997 Rejected July 17, 1998 NA
41.8 Modelling Series Switchable Devices John Fitzpatrick, Alcatel, Bob Ross, Interconnectix 2/12/97, 2/17/97, 5/14/97, 5/15/97, 5/16/97, 5/22/97, 5/28/97, 5/30/97, 6/12/97 June 12, 1997 3.0
40 Overshoot Nomenclature Bob Ross, Interconnectix, Inc. November 27, 1996 February 14, 1997 3.0
39 Specification Enhancement John Fitzpatrick, Alcatel CIT Ahmed Omer, Motorola, Inc. Jon Powell, Quad Design Bob Ross, Interconnectix, Inc. 10/11/96 November 8, 1996 3.0
38 Maximum Voltage John Fitzpatrick, Alcatel July 03, 1996 Rejected Nov. 8, 1996 (covered by BIRD39) NA
37.3 Enhancement To The Package Model (.pkg file) Specification Stephen Peters June 23, 1996, Aug. 12, 1996, Sept. 23, 1996, Oct. 18, 1996 Oct 18, 1996 3.0
36.3 Electric Descriptions of Boards Stephen Peters, Intel, Hank Herrmann, AMP June 23, 1996, Feb. 13, 1997, March 7, 1997, March 31, 1997 April 8, 1997 3.0
35.3 Multi-staged Outputs Bob Ross, Interconnectix, Inc. 5/13/96, 6/21/96, 10/16/96 12/6/96 3.0
34.2 Stored Charge Effects Bob Ross, Interconnectix, Inc. 3/5/96, 3/22/96, 9/27/96 September 27, 1996 3.0
33 Proposed IBIS Physical Package Format (.IAP) Kellee Crissafulli, Hyperlynx October 29, 1995 Rejected June 6, 1996 Proposed IBIS physical package Format (.IBP) Version 0.15 10-29-95 NA
32 Additional Enhancement To The Package Model (.pkg file) Specification C. Kumar Dec 14, 1995 (Actual Submission Jan. 11, 1996) Rejected May 30, 1997 NA
31.3 Mated Models Bob Ross, Interconnectix, Inc. 11/22/95, 3/18/96, 4/29/96, 5/4/96 Rejected 5/30/97 NA
30.2 Programmable buffers in IBIS models Arpad Muranyi 8-10-95, 10-03-95, 10-24-95 10-27-95 3.0
29.2 Banded_matrix Extension Bob Ross, Interconnectix, Inc. 26 May 1995, 5 June 1995 30 June 1995 (29.1), 21 July 1995 (29.2) ANSI 2.1
28.3 Enhancement To The Package Model (.pak file) Specification Stephen Peters May 18, 1995, June 26, 1995, August 21, 1995, Sept 20, 1995 October 6, 1995 3.0
27.1 Propose new keyword to specify default differential threshold Bob Ward, Texas Instruments & Bob Ross, Inteconnectix, Inc. 03APR95, 21SEPT95 Rejected October 6, 1995 NA
26 General syntax rules an guidelines on TAB character usage Arpad Muranyi, Intel Corporation, Folsom, CA March 20, 1995 May 26, 1995 ANSI 2.1
25.3 Data Derivation Expansion Bob Ross, Interconnectix, Inc. 25 January 1995, 7Feb95, 9Feb95, 24Feb95 24Feb95 ANSI 2.1
24.1 C_comp, ramp rates and waveform tables Stephen Peters Dec, 6, 1994 Passed 12/9/94 2.1
23 Waveform Table Minimum Number of Numerical Entries Bob Ross, Interconnectix, Inc. 19 November 1994 December 9, 1994 2.1
22 Sub-Parameter Case Sensitivity Bob Ross, Interconnectix, Inc. 29 October 1994 Rejected November 18, 1994 NA
21 Waveform Table Minimum Number of Entries Bob Ross, Interconnectix, Inc. 29 October 1994 November 18, 1994 2.1
20.1 Error correction regarding monotonicity statement in V2.1 IBIS specification. Kellee Crisafulli, HyperLynx Inc. 10-10-94, 11-18-94 11-18-94 2.1
19.1 V_fixture Subparameter Min/Max Additions Bob Ross, Interconnectix, Inc. 8 August 1994, 13 August 1994 August 26, 1994 2.1
18.2 [Diff Pin] Parameter Order Bob Ross, Interconnectix, Inc. 20 July 1994, 25 July 1984, 5 Aug 1994 5 August 1994 2.1
17 Number of Points Scott Bloom, Interconnectix, Inc. 17 July 1994 Rejected August 26, 1994 NA
16 Adding an override section for [Model] sub-parameters John Keifer at Intel May 23, 1994 (from a portion of BIRD14.1, BIRD14.2) Rejected November 18, 1994 NA
15 Clarification on the usage of the V/I tables. Arpad Muranyi, Intel Corporation May 10, 1994 May 20, 1995 (with revisions in Standard) 2.0
14.3 Adding four new sub-parameters to [Model] John Keifer at Intel April 26, 1994, May 18, 1994, May 20, 1994 May 20, 1994 (A portion of BIRD14.1, BIRD14.2 resubmitted as BIRD16) 2.0
13.2 Clarify Some Conditions of Measurements Bob Ward Texas Instruments 22 APR 94, 13 MAY 94 May 20, 1994 2.0
12.2 Non-Linear Driver Waveforms Stephen Peters, Intel Corp. April 25, 1994, April 29, 1994 May 13, 1994 2.0
11.2 Improving common error detection in IBIS_CHK program. Kellee Crisafulli, HyperLynx Inc. 03-28-94, 04-21-94 April 29, 1994 2.0
10.2 Describing coupling effects in package models Eric Bracken, Performance Signal Integrity, Inc. 17 March 1994, 15 April 1994 April 29, 1994 2.0
9.3 Terminator Specification Bob Ross, Interconnectix, Inc. 2 February 1994, 21 February 1994, 22 April 1994, 29 April 1994 29 April 1994 2.0
8.2 Specification of V/I data monotonicity Kellee Crisafulli, HyperLynx Inc. January 29, 1994, 5-9-94 May 13, 1994 2.0
7.2 Open Specification Completion Bob Ross, Interconnectix, Inc. 13 January 1994, 31 January 1994, 1 February 1994 February 18, 1994 2.0
6.2 Differential Pin Specification Bob Ross, Interconnectix, Inc. 12 January 1994, 29 January 1994, 5 February 1994 February 18, 1994 2.0
5.4 Pin Mapping for Ground Bounce Simulation Bob Ross, Interconnectix, Inc. May 13, 1994, May 15, 1994 May 20, 1995 2.0
4 ECL Extensions Stephen Peters, Intel Corp. November 5, 1993 November 12, 1993 2.0
3 Multiple power supplies and references Stephen Peters, Intel Corp. Nov 4, 1993 November 12, 1993 2.0
2.2 Requiring VIH VIL thresholds for input devices Jon Powell, Quad Desgin October 4, 1993, February 16, 1994; April 26, 1994 April 29, 1994 2.0
1 ECL Extensions Stephen Peters, Intel Corp. September 22, 1993 Rejected November 12, 1993 (transmutted to BIRD4) NA

The incorporation of the BIRDs into versions of IBIS is also shown in birddir.txt.

The roadmap for incorporation of pending BIRDs into future versions of IBIS is shown in ibis-version-change-strategy-v2p4.pdf.

Previous minor versions of BIRDs are archived here.