CONTENT OF THE EIA IBIS OPEN FORUM SUMMIT MEETING
February 9, 2006
Santa Clara, California

   .zip  Compressed
   .ppt  Power Point
   .doc  Word
   .ps   Postscript
   .pdf  Acrobat
   .txt  Text

ADMINISTRATIVE DOCUMENTS:

00readme.txt    This Document
a020906.txt     Agenda
m020906.txt     Minutes

PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION):

mirmak.zip      IBIS Chair's Report and Roadmap (.ppt)
mirmak.pdf      Michael Mirmak, Intel Corporation

wolff.zip       HDL and IBIS 4.1 Models in a Functional DDR Memory
wolff.pdf       Interface Analysis (.ppt)
                Randy Wolff, Micron Technology

dodd.zip        IBIS: Addressing Challenges in Behavior and
dodd.pdf        Measurement (.ppt)
                Ian Dodd, Mentor Graphics Corporation

ross1.zip       C_comp and [Driver Schedule] Observations
ross1.pdf       Bob Ross, Teraspeed Consulting Group

westerhoff.zip  Current Status - IBIS 4.1 Macro Library for Simulator
westerhoff.pdf  Independent Modeling (.ppt)
                Todd Westerhoff, Cisco Systems, Inc.

muranyi1.pdf    IBIS Macro Model Library - Overview
                Arpad Muranyi, Intel Corporation

huq.zip         Asian IBIS Summit December 2005 Slideshow (.ppt)
huq.pdf         Syed Huq, Cisco Systems, Inc.
 
ross2.zip       Asian IBIS Summit Review (.ppt)
ross2.pdf       Bob Ross, Teraspeed Consulting Group

maurer.zip      SSO Simulation with IBIS (.ppt)
maurer.pdf      Manfred Maurer, Siemens AG.

pandit.zip      Differential System Design and Power Delivery (.ppt)
pandit.pdf      Vishram Pandit and Michael Mirmak, Intel Corporation
                Presented by Vishram Pandit, Intel Corporation

chitwood.pdf    Proposed Touchstone Improvements for Optimization of
                Mixed PDS and I/O Models
                Sam Chitwood, Sigrity

muranyi2.pdf    Accuracy of IBIS Models with Reactive Loads
                Arpad Muranyi, Intel Corporation