IBIS Open Forum Minutes

Meeting Date: May 16, 2012
Meeting Location: SPI-E IBIS Summit, Sorrento, Italy

VOTING MEMBERS AND 2012 PARTICIPANTS
Agilent     Radek Biernacki, Yoji Sekine, Fangyi Rao
Altera                            David Banas, Hsinho Wu, Masashi
Shimanouchi
AMD   (Nam Nguyen)
ANSYS (Ansoft)               Flavio Calvano*
Apple Computer               (Matt Herndon)
Applied Simulation Technology     Norio Matsui
Cadence Design Systems       Terry Jernberg, Jilin Tan, Dennis Nagle
                              Ambrish Varma
Cisco Systems                David Siadat, Mike Sapozhnikev
Ericsson                     Anders Ekholm, Zilwan Mahmod, Mattias
Lundquist
Foxconn Technology Group          (Sogo Hsu)
Freescale                    (Jon Burnett)
Green Streak Programs        (Lynne Green)
Huawei Technologies               Xiaoqing Dong
IBM                          Adge Hawes, Greg Edlund
Infineon Technologies AG          (Christian Sporrer)
Intel Corporation      Michael Mirmak, Udy Shrivastava, Stewart Gilbert
        Eddie Frie
IO Methodology               Lance Wang*
LSI                          Brian Burdick
Maxim Integrated Products         Hassan Rafat, Mahbubul Bari
Mentor Graphics              Arpad Muranyi, Vladimir Dmitriev-Zdorov
Micron Technology                 Randy Wolff*, Aniello Viscardi*,
Francesco Madonna*
                               Antonio Prisco*
Nokia Siemens Networks GmbH  Eckhard Lenski*, Evis Minga*
QLogic                            (James Zhou)
Signal Integrity Software         Walter Katz, Mike LaBonte, Todd
Westerhoff
                               Akalu Lentiro
Sigrity                           Raymond Chen, Yingxin Sun, Sam Chitwood
                               Ben Franklin*, Srdjen Djordjevic*
Synopsys                     Andy Tai, Scott Wedge, Hany Elhak, Ted Mido
Teraspeed Consulting Group        Bob Ross, Tom Dagostino
Texas Instruments                 Casey Morrison, Pegah Alavi, Valerie
Chang
                               Modesto Garcia, Karl Muth
Toshiba                      (Yasumasa Kondo)
Xilinx                            Harry Fu
ZTE                          (Huang Min)
Zuken                        Michael Schaeder


OTHER PARTICIPANTS IN 2012
Aruba Networks               Amir Motamedi
Avago Technologies                Sanjeev Gupta, Amolak Badesha
Bayside Design               Elliot Nahas
Cavium                       Johann Nittmann
Enterasys                    Robert Haller
Exar Corporation             Helen Nguyen
Granite River Labs                Jiang Xu, Johnson Tan
Hewlett-Packard              Ting Zhu
High Speed Design Center          Ben Chia
Hitachi                           Yutaka Uematsu*
Instituto de Telecomunicações     Wael Dghais*, Hugo Teixeira*
KEI Systems                  Shinichi Maeda
Luxshare-ICT                      Alan Kinningham, Steven Wong
MK Resolutions               Olga Chervyakova
Nvidia                            Eric Hsu
Politecnico di Torino             Stefano Grivet-Talocia*
Research In Motion                Yi Cao
Sony                         Kenji Yasoda
ST Microelectronics               Davide Pandini*
TechAmerica                  (Chris Denham)
Université de Brest               Mihai Telescu*, Cherif Diouf*
University of Illinois            Thomas Comberiate, José Schutt-Ainé*
Vitesse Semiconductor        Sirius Tsang

In the list above, attendees at the meeting are indicated by *.  Principal
members or other active members who have not attended are in parentheses.
Participants who no longer are in the organization are in square brackets.


UPCOMING MEETINGS
The bridge numbers for future IBIS teleconferences are as follows:

Date                   Meeting Number        Meeting Password
June 1, 2012                 205 475 958                 IBIS

For teleconference dial-in information, use the password at the following
website:

      https://ciscosales.webex.com/ciscosales/j.php?J=205475958

All teleconference meetings are 8:00 AM to 9:55 AM US Pacific Time.
Meeting agendas are typically distributed seven days before each Open
Forum.  Minutes are typically distributed within seven days of the
corresponding meeting.  When calling into the meeting, follow the prompts
to enter the meeting ID.  For new, local international dial-in numbers,
please reference the bridge numbers provided by Cisco Systems at the
following link:

      http://www.cisco.com/web/about/doing_business/conferencing/index.html

NOTE: "AR" = Action Required.


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OFFICIAL OPENING
The IBIS Open Forum Summit was held in Sorrento, Italy at the Parco dei
Principi – Sorrento Hotel following the 2012 SPI conference.  About 18
people representing 11 organizations attended.

The notes below capture some of the content and discussions.  The meeting
presentations and other documents are available at:

      http://www.eda.org/ibis/summits/may12/

Lance Wang welcomed all the participants and thanked the co-sponsors Micron
Technology, Nokia Siemens Networks and Zuken. He asked all the participants
to introduce themselves.  There were a wide variety of people from many
countries and organizations including academia and industry.


IBIS MODELING USING LATENCY INSERTION METHOD (LIM)
José Schutt-Ainé*, Jilin Tan**, Ping Liu**, Feras Al-Hawari**, Ambrish
Varma**, *University of Illinois at Urbana-Champaign, **Cadence Design
Systems, USA

José Schutt-Ainé presented.  He noted the use of a different approach to
simulation.  The usual Newton-Raphson method makes a guess for a solution
and iterates until the solution converges. Sometimes this method locks into
oscillations and the solution will not converge. The Latency Insertion
Method (LIM) has convergence advantages. It does not use matrix
formulations.  Each branch must have an inductor, and each node must have a
shunt capacitor.  LIM is easy to code and is fast.  LIM has no convergence
issues, but it suffers from stability issues.

LIM can be applied to IBIS.  First, Ku and Kd coefficients must be solved
from the V-t waveforms.  Then, a LIM formulation can be used for the
circuit simulation.  José also showed an example of modeling gate
modulation effects (BIRD98.3).

Eckhard Lenski asked where the problems with non-convergence of Newton-
Raphson on slide 28 came from.  José responded that he did not discover
specific issues with the IBIS models, just that the solution would not
converge.

A question was asked if the package parasitics might cause problems with
Ku/Kd solutions, leading to failures of the Newton-Raphson method.  José
noted that Newton-Raphson non-convergence is very common.


SSO NOISE AND CONDUCTED EMI: MODELING, ANALYSIS, AND DESIGN SOLUTIONS
Patrice Joubert Doriol#, Aurora Sanna#, Akhilesh Chandra##, Cristiano
Forzan#, and Davide Pandini#, STMicroelectronics, #Italy, ##India

Davide Pandini summarized that he would discuss the use of IBIS models to
solve signal integrity and power integrity challenges.  Conducted EMI
coming from signals is a problem at ST.  EMC measurements for compliance
were traditionally done at the end of the design flow, and if the design
had issues, new mask sets would be very expensive.  EMC-aware design is the
goal, creating EMC models and doing EMC simulation before fabrication.
Some noise can be injected on a stable victim from a switching aggressor.
This causes conducted emissions on the victim I/O signal.  Davide
summarized the full SSO analysis flow.  He showed a micro-controller design
for an automotive application.  Skewing of the I/O timing achieved a
significant reduction in the amplitude of several harmonics.  Skews of 10ns
were possible due to the slow working frequencies of the technology.
Reducing the I/O drive strength also further reduced the SSO noise. The
gate-level SSO flow compared well to the Spice-level simulation.

IBIS 4.0 models did not work well for the SSO simulations, but IBIS 5.0
models compared well to Spice up to 2GHz in frequency domain analysis.  He
concluded that IBIS 5.0 can be used for reliable SSO and EMI analysis.

Eckhard Lenski asked what kind of package models were used.  Davide replied
that the models were RLC.  Lance Wang asked how the frequency domain
analysis waveforms were generated.  Davide responded that an FFT of the
time domain waveforms was used.  Stefano Grivet-Talocia asked why the
frequency matched only to 2GHz.  Lance commented that it might be from poor
modeling of C_comp frequency dependence.  Davide added that the V-t
waveforms look like they match well, but zooming in, there are some
differences.


VERSATILE SURROGATE MODELS FOR IC BUFFERS
Cherif Diouf*, Mihai Telescu*, Igor Stievano**, Flavio Canavero**, P.
Clostre*, N. Tanguy*, *Université Européenne de Bretagne, Université de
Brest, France; **Politecnico di Torino, Italy

Mihai Telescu presented modeling work of the authors.  IC buffers are
highly non-linear systems.  Behavioral modeling techniques include IBIS and
MÏ€log.  Previous approaches to modeling include MÏ€log plus the use of
Volterra series and constraints to improve static behavior.  He introduced
the theoretical framework for a new modeling approach.  The model for a
driver was implemented in Spice and validated against two different system
loads.  A model of cascaded drivers was then used to have a more non-linear
system and was compared against the previous loads.  Correlation was
acceptable with room for improvement.  There is ongoing research on more
complex and recent buffers.  They are working to tune the method to the
needs of the industry.  They would like feedback on the complexity versus
the versatility desired.

Wael Dghais asked if the weighting factors on slide 12 were related to the
K coefficients in IBIS algorithms.  Mihai responded that they were not
related.  Mahai clarified for Lance Wang that a least-squares method was
used to determine the coefficients to fit the equations to the Spice
results of the training simulations.  Mihai clarified for Randy Wolff that
the training simulations on slide 11 must be given ranges that will
incorporate desired system loads, but more feedback is desired in this
area.


TOWARDS REAL TIME S-PARAMETER QUALIFICATION AND MACROMODELING
Stefano Grivet-Talocia, Politecnico di Torino, Italy

Stefano Grivet-Talocia introduced S-parameters and their use in SI/PI
simulations. S-parameters must be qualified by looking for issues with
passivity and causality.  Circuit simulators assume that models are causal,
so when non-causal S-parameters are used, they lead to unpredictable
results.  A generalized Hilbert transform can be used for generating a
causality check error function.  Macromodeling can be used to very
accurately model S-parameter responses with rational function fitting of
poles and zeros. He described a method developed to take advantage of multi-
core processors to create the vector-fit macromodels quickly and
efficiently.  Passivity of the macromodel can be checked by looking at the
eigenvalues.  Computation of the eigenvalues works well with parallel
processing.

Stefano described the HPM service developed by Politecnico di Torino that
is an online resource for creating S-parameter macromodels.

Randy Wolff asked about support of IBIS-ISS as an output.  Stefano said
that support of this would be easy to add if there is a need.  Lance Wang
asked about support of Touchstone 2.0.  Stefano responded that mixed mode
support is not available yet, but it is being worked on.  Mihai Telescu
asked about use of the modeling to fix passivity and causality issues.
Stefano responded that the macromodeling can fix issues, but it doesn't
guarantee that the model is a better model of the original system than the
original Touchstone file with its issues.  Also, if the input data is
highly non-causal, the macromodel will not be a good fit to the original S-
parameters.


IMPACT OF ACCURATE PDN MODEL ON IBIS SI AND PI SIMULATIONS
Antonio Girardi and Aniello Viscardi, Micron Semiconductor Italia S.r.l.,
Italy

Randy Wolff presented for the authors.  An investigation of several power
supply decoupling models was carried out on a LPDDR2 memory device.  20
I/Os were switched in an SSO simulation that included a coupled package
model and a system load model.  IBIS 5.0 driver models included BIRD95 and
BIRD98 data tables.  Four cases of PDN models were simulated including a
case with no power supply decoupling, a capacitive-only model, an RC model,
and a vector-fit decoupling model.  The C-only model created a resonance
with the package inductance that led to unrealistic ringing in the voltage
waveform at the power pad.  The RC model was created manually, and the
addition of the ESR to the C-only model led to good agreement between
behavioral simulation and Spice simulation.  The vector-fit decoupling
model was created automatically and led to a closer match than the RC
model.   The vector-fit model was a Spice subcircuit created from the S11
PDN response.  Randy noted that there was not a large difference between
the RC and the vector-fit models in the case shown, but there could be
cases where the vector-fit model provides much better results than the RC,
manually-fitted model.

Randy clarified that the vector-fit subcircuit model could be easily made
IBIS-ISS compliant and currently would need to included externally to an
IBIS 5.0 model.  He noted in response to a question from Eckhard Lenski
that Micron is currently looking into providing IBIS 5.0 models for certain
memory devices.


DDR4 IBIS POWER INTEGRITY SIMULATION
Randy Wolff*, Lance Wang**, *Micron Technology, **IO Methodology, USA

Randy Wolff began with an overview of the new DDR4 memory technology.  He
noted that he wanted to look at potential issues with Power Integrity
modeling of DDR4 with IBIS 5.0.  Overclocking was a concern with the faster
bit rates compared to DDR3.  An automated IBIS 5.0 buffer extraction tool
was used to create the I-V, V-t and I-t data tables.  Randy noted that the
tool used a best-points-fit algorithm, although this was not a major
benefit with 1000 points available for the V-t and I-t tables.  However, it
is inevitable that customers will ask for an IBIS 3.2 compliant model, and
in that case it will be necessary to remove the I-t data and limit the V-t
data to 100 points.  A best-points-fit algorithm will be needed for this.

Overclocking was a concern, because the bit length at DDR4-1600 is 625ps
and the [Composite Current] data was 750ps long in the typical corner and
850ps long in the slow corner.  These lengths also required windowing of
the data from tables that were 1.2ns in length.  Data windowing may be
automatic in some simulators, but may require manual adjustment in others.
Simulations did reveal overclocking problems at DDR4-1600.  The model was
then simulated at DDR4-1866, and the problems got much worse.  Manual
windowing of the data tables was necessary, but a bug was found where the
voltage waveforms looked ok, but the current waveforms were shifted in
time.  Other simulations revealed reasonable correlation between Spice and
IBIS results.  Randy also noted that a vector-fit decoupling model might
improve correlation.

Eckhard Lenski asked if it was now necessary to warn customers about
overclocking issues.   Randy responded that one problem is that he can't
test the models in every simulator, so the vendors need to step forward and
provide more testing and validation.  Known overclocking issues should be
mentioned in model quality reports.  Randy added that even in overclocking
situations, the pre-driver current will always be there, so it must not be
ignored.


MORE EXPERIENCES WITH IBIS-AMI MODELS
Eckhard Lenski, Nokia Siemens Networks GmbH, Germany

Eckhard Lenski gave an overview of IBIS-AMI model usage.  He noted that a
good documentation file must accompany the model to help the user.  He
described the boundaries between the Tx, channel and Rx models.  He also
showed the IBIS-AMI parameters and Tx and Rx elements.  His experiences
using the models have varied, including issues such as models not working
in both Windows XP and 7, models with the package model inside the .dll
file, incomplete .ami files, mis-alignment of values between the .ibs file
and the .ami file, and documentation that does not match the model.

Randy Wolff added that his first and recent experience using an IBIS-AMI
model revealed very poor documentation as well.  Stefano Grivet-Talocia
asked about LTI assumptions with AMI modeling.  Discussion confirmed that
the convolution used in AMI model processing requires LTI assumptions.
Modeling of non-LTI effects in the AMI models is not perfect and the
methods are hidden within the .dll file.


EFFICIENT TABLE-BASED I-Q BEHAVIORAL MODEL FOR HIGH-SPEED DIGITAL
BUFFERS/DRIVERS
Wael Dghais*, Hugo Teixeira*, T.R. Cunha, J.C. Pedro, Universidade de
Aveiro, *Instituto de Telecomunicações, Portugal

Wael Dghais presented.  He showed the structure of a digital I/O buffer.  A
new model creates an output impedance I-Q model.  Q-V curves are extracted
using AC simulation.  I-V/C-V and I-V/Q-V models showed similar accuracy,
but the I-V/Q-V model was faster to simulate.  The new models showed better
accuracy and matching to the transistor level model than the IBIS model.
The models contain data tables very similar to IBIS models.

Lance Wang asked about implementing the model in simulation.  Wael
confirmed that it requires changing the algorithms in the simulator as well
as extracting a new data table.  The approach does complement existing
IBIS, using similar I-V data extracted from simulation.  Mihai Telescu made
some comments about this approach versus the MÏ€log modeling.  MÏ€log
modeling works with continuous time, whereas IBIS and this approach work in
discrete time.


AD HOC PRESENTATION
Stefano Grivet-Talocia on request from Lance Wang presented on details of
rational curve fitting algorithms.  The slides used were a subset of his
presentation “Passive Macromodeling” given at EMC Europe on 8/9/2008 in
Hamburg, Germany.


CLOSING REMARKS
Lance Wang closed the meeting by thanking the co-sponsors and the
presenters.  He also thanked all the attendees for making the meeting a
success.  The meeting concluded at approximately 6:00 PM.


NEXT MEETING
The next IBIS Open Forum teleconference will be held June 1, 2012 from 8:00
to 10:00 AM US Pacific Standard Time.

========================================================================
NOTES

IBIS CHAIR: Michael Mirmak (916) 356-4261, Fax (916) 377-3788
      michael.mirmak@intel.com
      Data Center Platform Applications Engineering
      Intel Corporation
      FM5-239
      1900 Prairie City Rd.,
      Folsom, CA 95630

VICE CHAIR: Lance Wang (978) 633-3388
      lwang@iometh.com
      President/CEO, IO Methodology, Inc.
      PO Box 2099
      Acton, MA  01720

SECRETARY: Randy Wolff (208) 363-1764, Fax: (208) 368-3475
      rrwolff@micron.com
      SI Modeling Manager, Micron Technology, Inc.
      8000 S. Federal Way
      Mail Stop: 01-711
      Boise, ID  83707-0006

LIBRARIAN: Anders Ekholm (46) 10 714 27 58, Fax: (46) 8 757 23 40
      ibis-librarian@eda.org
      Digital Modules Design, PDU Base Stations, Ericsson AB
      BU Network
      Färögatan 6
      164 80 Stockholm, Sweden

WEBMASTER: Mike LaBonte
      mikelabonte@eda.org
      IBIS-AMI Modeling Specialist, Signal Integrity Software
      6 Clock Tower Place
      Maynard, MA 01754

POSTMASTER: Mike LaBonte
      mikelabonte@eda.org
      IBIS-AMI Modeling Specialist, Signal Integrity Software
      6 Clock Tower Place
      Maynard, MA 01754

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IBIS CURRENT MEMBER VOTING STATUS

I/O Buffer Information Specification Committee (IBIS)
|Organization      |Interest  |Standar|March  |April  |May 11,|May 16,|
|                  |Category  |ds     |30,    |20,    |2012   |2012   |
|                  |          |Ballot |2012   |2012   |       |       |
|                  |          |Voting |       |       |       |       |
|                  |          |Status |       |       |       |       |
|Advanced Micro    |Producer  |Inactiv|-      |-      |-      |-      |
|Devices           |          |e      |       |       |       |       |
|Agilent           |User      |Active |X      |X      |X      |-      |
|Technologies      |          |       |       |       |       |       |
|Altera            |Producer  |Active |X      |-      |X      |-      |
|ANSYS             |User      |Inactiv|-      |-      |-      |X      |
|                  |          |e      |       |       |       |       |
|Apple Computer    |User      |Inactiv|-      |-      |-      |-      |
|                  |          |e      |       |       |       |       |
|Applied Simulation|User      |Inactiv|-      |-      |-      |-      |
|Technology        |          |e      |       |       |       |       |
|Cadence Design    |User      |Inactiv|X      |-      |-      |-      |
|Systems           |          |e      |       |       |       |       |
|Cisco Systems     |User      |Inactiv|-      |-      |-      |-      |
|                  |          |e      |       |       |       |       |
|Ericsson          |Producer  |Active |X      |X      |X      |-      |
|Foxconn Technology|Producer  |Inactiv|-      |-      |-      |-      |
|Group             |          |e      |       |       |       |       |
|Freescale         |Producer  |Inactiv|-      |-      |-      |-      |
|                  |          |e      |       |       |       |       |
|Green Streak      |General   |Inactiv|-      |-      |-      |-      |
|Programs          |Interest  |e      |       |       |       |       |
|Huawei            |Producer  |Inactiv|-      |-      |-      |-      |
|Technologies      |          |e      |       |       |       |       |
|IBM               |Producer  |Active |X      |X      |X      |-      |
|Infineon          |Producer  |Inactiv|-      |-      |-      |-      |
|Technologies AG   |          |e      |       |       |       |       |
|Intel Corp.       |Producer  |Active |X      |X      |X      |-      |
|IO Methodology    |User      |Active |X      |-      |X      |X      |
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|Maxim Integrated  |Producer  |Inactiv|-      |-      |-      |-      |
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|Nokia Siemens     |Producer  |Active |X      |X      |-      |X      |
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|QLogic            |Producer  |Inactiv|-      |-      |-      |-      |
|                  |          |e      |       |       |       |       |
|Signal Integrity  |User      |Active |X      |X      |X      |-      |
|Software          |          |       |       |       |       |       |
|Sigrity           |User      |Active |X      |X      |-      |X      |
|Synopsys          |User      |Inactiv|-      |-      |-      |-      |
|                  |          |e      |       |       |       |       |
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|                  |          |e      |       |       |       |       |
|ZTE               |User      |Inactiv|-      |-      |-      |-      |
|                  |          |e      |       |       |       |       |
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