DATE: 01/13/05

SUBJECT: January 7, 2005 EIA IBIS Open Forum Meeting Minutes

VOTING MEMBERS AND 2005 PARTICIPANTS
Actel                          (Prabhu Mohan)
Ansoft Corporation             (Michael Brenneman)
Applied Simulation Technology  (Norio Matsui)
Cadence Design Systems         Lance Wang*, Donald Telian*
Cisco Systems                  Syed Huq*, Mike LaBonte*, Todd Westerhoff,
                                 Zhiping Yang*, Vinu Armumugham*
Freescale                      (Jon Burnett)
Hitachi ULSI Systems           (Kazuyoshi Shoji)
Huawei                         (Jiang Xiang Zhong)
IBM                            (Pravin Patel)
Intel Corporation              Michael Mirmak*, Arpad Muranyi*
LSI Logic                      (Frank Gasparik)
Matsushita (Panasonic)         (Atsuji Ito)
Mentor Graphics                John Angulo*, Guy de Burgh*,
Micron Technology              Randy Wolff*
NEC Electronics Corporation    (Takeshi Watanabe)
Samtec                         Otto Bennig*
Siemens AG                     (Eckhard Lenski)
Signal Integrity Software      Robert Haller*
Sigrity                        Sam Chitwood*, Jing Ting*
Synopsys                       (Warren Wong)
Teraspeed Consulting Group     Bob Ross*
Texas Instruments              (Jean Claude Perrin)
Time Domain Analysis Systems   (Dima Smolyansky)
Xilinx                         Ray Anderson*
Zuken                          (Michael Schaeder)

OTHER PARTICIPANTS IN 2005:
Enterasys Networks             Fabrizio Zanella*
GEIA                           (Chris Denham)
Leventhal Design               Roy Leventhal*
Marvell                        Itzik Peleg*
North Carolina State Univ.     Ambrish Varma*

In the list above, attendees at the meeting are indicated by *.
Principal members or other active members who have not attended are in
parentheses. Participants who no longer are in the organization are in
square brackets.

UPCOMING MEETINGS
The bridge numbers for future IBIS teleconferences are as follows:

       Date          Telephone Number    Bridge #     Passcode
 January 28, 2005    1-916-356-2663         4         066-5906
 January 31, 2005    DesignCon IBIS Summit - No bridge

All meetings are 8:00 AM to 9:55 AM US Pacific Time.  Meeting agendas
are typically distributed seven days before each Open Forum.  Minutes
are typically distributed within seven days of the corresponding
meeting.  When calling into the meeting, provide the bridge number and
passcode at the automated prompts.  If asked by an operator, please
request to join the IBIS Open Forum hosted by Michael Mirmak.
For international dial-in numbers, please contact Michael Mirmak.

NOTE: "AR" = Action Required.

--------------------------------MINUTES-----------------------------------
INTRODUCTIONS AND MEETING QUORUM
Sam Chitwood introduced himself as an applications engineer with Sigrity in
San Jose.  He is interested in IBIS with respect to power and ground
simulation.  Itzik Peleg of Marvell in Isreal introduced himself.  He makes
IBIS models and is interested in power integrity simulation.  Fabrizio
Zanella of Enterasys introduced himself.  He is a signal integrity engineer
and is interested in power integrity.  Jing Ting from Sigrity introduced
himself.  He works in their simulation team.


CALL FOR PATENTS
Michael Mirmak called for any patents or pending patents related to the
IBIS Version 3.2, 4.0, 4.1, or ICM 1.0 specifications.  No patents were
declared.


MEMBERSHIP UPDATE AND TREASURER'S REPORT
Michael Mirmak reported that membership for 2005 looks to be approximately
30 members including renewals and new memberships.  The actual membership at
this time is 25 based on carrying over last year's list and adding Xilinx as
a new member.  He is formalizing invoicing details with GEIA.  If a company
has not received an invoice yet, they should see their invoice next week.
There was no update on the treasurer's report.


REVIEW OF MINUTES AND ARS
Michael Mirmak reviewed the minutes of the December 10, 2004 IBIS Open Forum
teleconference.  The minutes of the meeting were approved without change.


PRESS AND WEB PAGE UPDATES
Syed Huq reported that he is in the process of updating the membership
roster for 2005.  He is following up with new members to get contact
information, etc.  Bob Ross mentioned not including the membership asterisk
next to the names of new members until their payment is received by GEIA.


NEW MODELS AVAILABLE, LIBRARY UPDATE
Lance Wang reported no new models available.  He asked new members to send
him links to online IBIS model locations, and he will put them in the model
library.


MISCELLANY/ANNOUNCEMENTS
Roy Leventhal mentioned the 2005 IEEE EMC Symposium August 8-12 in Chicago.
The IEEE EMC Society has shown a remarkable increase in interest in signal
integrity and power integrity simulations, and many members are familiar
with IBIS and use IBIS models in simulation.  More information can be found
at: http://www.emc2005.org/


OPENS FOR NEW ISSUES
None.


MAILING LIST ADMINISTRATION
Bob Ross reported one day of outage on the reflector.  That has been
resolved.  He has also seen some of the spam filters reject some emails.


INTERNATIONAL/EXTERNAL PROGRESS
Michael Mirmak reported on work group relations with IEEE/DASC on VHDL-AMS
and Accellera on Verilog-AMS.  He is in contact with the Accellera
Verilog-AMS group leader.  Of note is that the VHDL-AMS working group is
having its first meeting of the year at the DATE conference in Munich.  He
wants to make sure that one IBIS representative will attend this meeting.
Also, the VHDL-AMS Standard Packages standard has been approved, so this
should be noted for future IBIS activities.


SUMMITS
- DesignCon IBIS Summit, January 31, 2005, Santa Clara, CA

  DesignCon 2005 will take place January 31 - February 3, with a Summit
  scheduled for Monday, January 31. Syed Huq will send out a third call for
  papers Monday.  An agenda will be sent out no later than one week before
  the summit (January 24).  Presentation materials are needed before that
  date.  Syed has received notice of five individual papers so far.
  The luncheon will be provided by DesignCon during the keynote speech.  We
  need to make our own arrangements for refreshments, and Michael Mirmak is
  looking into this.  Michael received notice that the IBIS booth is #940 on
  the display floor.  John Angulo and Mentor are taking care of booth
  arrangements including setup and tear down.

- DATE European IBIS Summit, March 11, 2005, Munich, Germany

  DATE 2005 will take place in Munich, with a Summit planned for Friday,
  March 11.  Ralf Bruening of Zuken has concluded making arrangements for
  the room and other logistics.  Bob Ross reported that the first
  announcement was sent out and that several presentations are already
  planned.


- JEITA Asian IBIS Event, March 24, 2005, Tokyo, Japan

  Michael Mirmak reported that JEITA members are still in the planning
  stages.  JEITA has requested some IBIS participation, however the event
  is closed.

Sponsorship opportunities for all these Summits are still available, with
sponsors receiving free mentions in the minutes, agenda, and other
announcements.


IBIS ANSI BALLOT STATUS
Randy Wolff reported that the balloting process was closed on December 23,
2004.  A final vote tally has not been received from GEIA, however
unofficial vote tallies show that the ballot for reapproval of IBIS 3.2 was
successful.  During the process, several inconsistencies between IBIS and
GEIA on primary and secondary contact names was cleared up.


S2IBIS3 STATUS
Ambrish Varma reported that he needs to implement new clamp subtraction
algorithms.  He will be looking into that and is in contact with Bob Ross.
A new release will be provided eventually.  The next version will be
released as 1.0 (non-beta).

S2IBIS3 beta executables can be downloaded from:

  http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm

Feedback on the current version is appreciated and encouraged.


IBIS VERSION 4.1 PARSER STATUS
Bob Ross reported no further progress.


ICM SPECIFICATION AND PARSER STATUS
Michael Mirmak reported that there have been offline discussions with Kelly
Green regarding BUGs. No major issues have been found with the parser as it
stands today.


IBIS QUALITY COMMITTEE
Bob Haller reported that the committee is meeting on the first Tuesday of
each month. The last meeting was January 4.  The next meeting will be
February 8th.  The discussion at the last meeting was about categorizing
which checks are not in the parser and whether or not they should be
warnings or cautions.


IBIS MODEL REVIEW COMMITTEE
No report.


FUTURES AND COOKBOOK COMMITTEES
Michael Mirmak reported that next Thursday is the next meeting.  The final
Cookbook is planned to be completed by DesignCon for discussion at the
DesignCon IBIS Summit.  Contact Michael Mirmak if interested in
participating.

Recent committee material is stored at:

   http://www.ibis-information.org/futures/


NEW ADMINISTRATIVE ISSUES
None.


BIRD92.1: MULTIPLE TERMINATOR AND SERIES ELEMENTS UNDER [MODEL]
Michael Mirmak asked for discussion to be deferred until the next meeting.


BIRD94: CLARIFICATIONS ON [DIFF PIN] PARAMETERS
Arpad Muranyi summarized the BIRD.  It attempts to fix several issues
related to the [Diff Pin] keyword in the IBIS specification.  These include
interpretations of "NA" and error checking related to model types.  The BIRD
cleans up conflicting language about the usage of NA values and default
settings used when data is not present.  Arpad stressed that NA and 0 should
not mean the same thing.  Bob Ross supported some parts of BIRD94, but
he wanted to proceed carefully due to the amount of changes and the
possibility that some EDA vendors have relied on the existing language.


BIRD95: POWER INTEGRITY ANALYSIS USING IBIS
Syed Huq introduced the BIRD.  This BIRD proposes a modeling scheme to
integrate power integrity analysis into the IBIS specification.  This
includes the current switching profile of the core as well as Simultaneous
Switching Noise (SSN) of the I/O stages of a buffer.  Itzik Peleg of Marvell
raised concern that a note needs to be added about time correlation to
rising/falling waveforms in the [Series Composite Current] tables.  It was
also recommended to state that the load condition for each I-t table should
be the same as the R_fixture value of the corresponding V-t table, otherwise
the value would be assumed to be 50 ohms, as this is the default value for
V-t tables per the specification.  Arpad Muranyi was curious about including
an I-t table not correlated to a V-t table.  The consensus was that there
must be a voltage table for every current table, and they are linked.  Bob
Ross questioned whether the data could be useful without the open, no-load
condition.  This will need to be investigated further.  Syed concluded the
discussion with a request for comments on the diagram.  Several other people
asked questions and raised issues, and many of the points were subsequently
expressed on the IBIS reflectors.


BIRD96: [MODEL SPEC] AND [RECEIVER THRESHOLDS] ORDERING
Discussion was deferred until the next meeting due to time constraints.


IIRD2.3: FREQUENCY DEPENDENT RLGC MATRICES
The call for vote was postponed until the next meeting.


IIRD8.2: DISTINCT MODEL_PINMAP AND MODEL_NODEMAP NAMES
The call for vote was postponed until the next meeting.


IBISCHK4 BUG STATUS
Discussion was deferred until the next meeting.


ICMCHK1 BUG STATUS
Discussion was deferred until the next meeting.


NEW TECHNICAL ISSUES
None.


NEXT MEETING
An Open Forum teleconference has been scheduled for January 28, 2005
from 8:00 AM to 10:00 AM US Pacific Time.  Votes are scheduled for IIRD2.3,
IIRD8.2, and BIRD92.1.  The next IBIS Summit will be held January 31, 2005.
No telephone bridge is available.


============================================================================
                               NOTES

IBIS CHAIR: Michael Mirmak (916) 356-4261, Fax: (916) 377-1046
            michael.mirmak@intel.com
            Senior Analog Engineer, Intel Corporation
            FM6-45
            1900 Prairie City Rd.
            Folsom, CA  95630

VICE CHAIR: Syed Huq (408) 525-3399, Fax: (408) 526-5504
            shuq@cisco.com
            Manager, Hardware Engineering, Cisco Systems
            170 West Tasman Drive
            San Jose, CA 95134-1706

SECRETARY:  Randy Wolff (208) 363-1764, Fax: (208) 368-3475
            rrwolff@micron.com
            Simulation Engineer, Micron Technology, Inc.
            8000 S. Federal Way
            Mail Stop: 1-711
            Boise, ID 83707-0006

LIBRARIAN:  Lance Wang (978) 262-6685, Fax: (978) 262-6363
            lwang@cadence.com
            Senior Member, Technical Staff, Cadence Design Systems, Inc.
            270 Billerica Road
            Chelmsford, MA 01824

WEBMASTER:  Syed Huq (408) 525-3399, Fax: (408) 526-5504
            shuq@cisco.com
            Manager, Hardware Engineering, Cisco Systems
            170 West Tasman Drive
            San Jose, CA 95134-1706

POSTMASTER: Bob Ross (503) 246-8048, Fax : (503) 239-4400
            bob@teraspeed.com
            Staff Scientist, Teraspeed Consulting Group
            10238 SW Lancaster Road
            Portland, OR 97219


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