Re: IBIS: Draft Press Release, Pls comment by 12/13/94

From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Date: Mon Dec 12 1994 - 15:17:38 PST

Text item: Text_1

 IBISers,
 
 Will's comments preceded by *.
 
 Will Hobbs
 Intel Corp.
 
 IBISians,

 Below is my rough-cut draft of a 2.1 press release. Please post
 comments/suggestions to the reflector by 4:00 pm Tuesday 12/13/94. I will
 craft a revision and post it for email acceptance Wednesday.

 Derrick Duehren
 ------------------------------------------------------------------------------
 XTG TPV Programs Manager, Intel Corp. |
 Phone (503) 696-4299 | "Experience is not what happens to
 Fax (503) 696-4904 | you; it's what you do with what
 Derrick_Duehren@ccm.jf.intel.com | happens to you."
 5200 NE Elam Young Pkwy. JF1-97 | - Aldous Huxley
 Hillsboro, OR 97224 |
 ------------------------------------------------------------------------------

For more information contact:
IBIS Open Forum For Immediate Release
Will Hobbs, (503) 696-4369 * (number not to be published)
Jon Powell, (805) 988-8250

                           IBIS Press Release
                              DRAFT 12/5/94

Rev 2.1 of IBIS Signal Integrity Model Specification Announced
IBIS Standard that Supports Early, Accurate Models for Signal Integrity
Simulations of High-speed Digital Systems Now Supports More Functions

HILLSBORO, Ore. _ December 9, 1994 _ A group of Electronic Design Automation
(EDA) and semiconductor companies today announced the ratification and
acceptance of Revison 2.1 of the I/O Buffer Information Specification (IBIS)
standard for integrity models. This improved and refined standard adds support
for

* ECL, dual-supply buffers, differential I/O, controlled rise-time buffers,
much more complete package descriptions, better support for open-side devices
(open drain, etc.), support for terminators, reference waveform.

IBIS is a consistent
* software parsable
format that semiconductor vendors can use to specify the analog characteristics
of input and output buffers. This essential information is readily transformed
into accurate models by end users and simulation tool vendors. The resulting
behavioral models enable users to perform high-speed, accurate signal-integrity
simulations of their digital system interconnects.

The IBIS Version 2.1 specification was developed through the cooperative
efforts of simulator vendors and semiconductor companies who together comprise
the IBIS Open Forum (see the attached roster).

IBIS Models Available

Intel, _______, and _______ have posted public models to the vhdl.org database.
* Many others are available directly from EDA vendors and IC vendors.

Group Plans to Formalize Standard in Early 1995

The IBIS Open Forum believes the specification is sufficiently robust and
comprehensive to be taken to the standards community for formal adoption.

For More Information

For more information about the IBIS Open Forum, send an e-mail request to
ibis-info@vhdl.org or call Karen Kirkpatrick, Cadence Design Systems, (508)
262-6448. All of the documents and publicly available models are currently
accessible via the public repository of VHDL International's Internet based
machine (vhdl.org, 198.31.14.3). FTP, Gopher, and public dial-in access
methods are all supported.

IBIS Open Forum
Contact List (Roster)

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Subject: IBIS: Draft Press Release, Pls comment by 12/13/94
To: IBIS@vhdl.org
Message-Id: <941212100903_1@ccm.hf.intel.com>
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Date: Mon, 12 Dec 94 10:09:03 PST
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